Added syntax highlighting for the Verilog and VHDL languages (#5641)

2023-08-04 05:26:41 +02:00
parent 5b67273d8f
commit 16f1328a83
2 changed files with 6 additions and 0 deletions
--- a/shared/editor/extensions/Prism.ts
+++ b/shared/editor/extensions/Prism.ts
@@ -47,6 +47,8 @@ export const LANGUAGES = {
  tsx: "TSX",
  typescript: "TypeScript",
  vb: "Visual Basic",
+  verilog: "Verilog",
+  vhdl: "VHDL",
  yaml: "YAML",
  zig: "Zig",
 };